Surface Mount Design Considerations in SMT & CTE Mismatching

There are many design issues that must be settled before a surface mount technology design or packaging direction is selected.

System analysts start with determining product needs in the marketplace. Therefore, the designer must look at the proposed product from the systems point of view. Great devices on printed circuit boards do not sell in the marketplace. Products sell. Therefore, the designer must consider market needs, function, and package moisture sensitivity. The product must also satisfy thermal and solder joints reliability requirements. As the packaging density increases, moreover, thermal problems are compounded, with a potential adverse impact on overall product reliability.

Solder joint reliability for surface mount is a source of concern because of CTE mismatch, between ceramic packages and PCB for SMT made from FR-4 glass epoxy substrates.

Because the plastic packages used in commercial applications have complaint

leads, they do not experience problems related to CTE mismatch. The large plastic packages, especially plastic ball grid arrays (PBGA), may be prone to cracking at reflow soldering temperatures, however, and this is an industry problem. Long-term solutions are still evolving, but baking before reflow soldering offers one answer.

The increase in SMD Electronic Components package density on board has necessitated the use of file lines at closer spacings. This can increase cross-talk between the lines, especially if they carry high speed signal. The product design is also influenced by the type of CAD system that is available. The cost or the schedule or both may be affected by the type of CAD system used for SMT PCB design.

Thus, for every SMT board, the designer must consider all the pros and cons of designing the board in SMT. In the decision is to go ahead with SMT, then it is important to follow the specific guidelines and rules.

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